As the operating speed of integrated circuits becomes faster it is becoming increasingly difficult to test such circuits using conventional electronic techniques. It is particularly difficult to test complex high speed digital circuits `on slice`, i.e. before the circuits have been separated by scribing and dicing the wafer. At present custom-made probe cards are used to provide electrical connection to an individual circuit via metal probes which are placed on the circuit bondpads. This method is unsatisfactory for two principle reasons. Firstly the characteristic impedance of the probe cannot be kept low enough to match into the integrated circuit. This is due primarily to parasitic capacitance. Secondly, electrical breakthrough from the input probe to the output probe can cause severe distortion of test waveforms resulting in somewhat uncertain test results.
Furthermore it is difficult to generate by purely electronic techniques programmable digital bit patterns or words of precise pulse widths and pulse spacings at clock rates greater than 1 gigabit/sec.
The object of the invention is to minimise or to overcome these disadvantages.
According to one aspect of the invention there is provided a processed semiconductor wafer including an array of integrated circuits each of which incorporates one or more photoreceivers whereby input light signals may be coupled to an adjacent circuit of the array.
According to another aspect of the invention there is provided a method of testing individual integrated circuits prior to separation by dicing from a processed wafer, the method including providing on each said circuit one or more photodetectors the outputs of which are coupled to an adjacent circuit of the array, applying an optical test code to the photodetectors, and monitoring the response of each said circuit on the test code.
The technique is particularly suitable for use with high speed digital circuits fabricated in gallium arsenide as it is fully compatible with gallium arsenide processing methods.